Recommended Web Links:

• JTAG.TECT (Russian web site) - http://www.jtag-test.ru

• IEEE 1500 Embedded Core Test - http://grouper.ieee.org/groups/1500/

• IEEE Design & Test - http://www.computer.org/portal/site/design

• Scanseer - http://www.scanseer.com/?gclid=CK-WkOyCyo4CFQxWZwodIGevAQ

• JTAG Toolkit - http://www.jtag.tk

• Asset InterTech - http://www.asset-intertech.com/products/free_resources.htm

• Asset BSDL Validation - http://www.asset-intertech.com/bsdl_service

• Corelis - http://www.corelis.com

• Goepel Electronic - http://www.goepel.com/content/html_en/index.php?site=bs_tutorial&level1=scan&level2=bs_tutorial&level3

• JTAG Technologies - http://www.jtag.com/main.php?cm=p8_1___2

• Flynn Systems - http://www.flynn.com/products/ontap.php?PHPSESSID=ab53a7b4f3e5480e513248ffba482c2c

• Bennetts Associates - http://www.dft.co.uk/other-links.html

• ATE World - http://www.ateworld.com/home_pages/news_release_archive.cfm

• Acculogic - http://www.acculogic.com

• Intellitech - http://www.intellitech.com

• XJTAG - http://www.xjtag.com/jtag.php

• DirectInsight - http://www.directinsight.co.uk/function/boundary-scan-jtag.html

• ElectronicsTalk - http://www.electronicstalk.com/guides/jtag.html

• MentorGraphics - http://www.mentor.com/products/dft/techpubs/index.cfm?v=google&p=adwords_bist&s=1x1&g=dft&c=dft_ocid_834_cfp_66_ceid_3-1x1-&asid=624#0

• IEEE 1149.4 Working Group - http://grouper.ieee.org/groups/1149/4/

• Teradyne - http://www.teradyne.com/atd

• National Seconductor - http://www.national.com/appinfo/scan

• Altera - http://www.altera.com/literature/an/an039.pdf

Our glance on the Test News Worldwide

You can found here links on the most interesting things, news and events in the world of the Structural Test Industry: ICT, JTAG, DFT, and others.

Your outlook about this is very appreciated!

• Expanded Role for JTAG DFT

• Relationships key to boundary-scan success

• Corelis Adds Capability to Directly Program Serial Bus I2C and SPI-based Devices

• Analog Boundary-Scan Description Language (ABSDL) for Mixed-Signal Boards Test

• Design-For-Testability Blog

• The DFT Blog

• Reuben Schrift’s paper on ICT in RoHS environment

• Boundary-scan tools extend beyond basic PCB testing

• Testability Management Action Group (TMAG)

• ...