JTAG External Modules (JEMIO^TM) for Cluster Test

The JTAG External Modules JEMIO^TM for Cluster test are intended to provide test access to off-board signals that otherwise could not be accessed by a JTAG test system. For many designs, Boundary-Scan has adequate access to on-board signals, but signals that go off the board often cannot be tested by a JTAG tester. By adding JTAG access to these off-board signals, JEMIO^TM modules can increase the board's JTAG test coverage, possibly reducing the need for implementing another test method or for developing alternative tests to reach the required level of test coverage.

The family JEMIO^TM modules provides a number of sets of JTAG accessible GPIOs or nets that can be used to control and observe signals that go off the board. Each JTAG channel is controlled individually and can be configured as an input, output, I/O or tri-state. The JEMIO^TM scan chain can be combined with the JTAG scan chains of the board being tested so it is included in the infrastructure verification and interconnect tests. Eventually, the JEMIO^TM modules should be used separately or designed into the board or system test fixture. The programming and control of the JTAG test channels during testing is automatically performed by JTAG tools of all vendors mentioned below without any user intervention.

The JEMIO^TM modules provide a flexible and low cost opportunity for JTAG test implementation for the board headers, edge connectors, PCB test points and pads, etc. By the use of JTAG-channels of the internal CPLD, the JEMIO^TM modules provide a number of fully bidirectional test channels for connectivity (interconnect) testing of the circuit elements that would otherwise be un-testable through JTAG test. The JEMIO^TM test setups and one of the JEMIO^TM modules are shown on the figure below.

JEMIO.1-74 module		JEMIOTM test setup for JTAG boards		JEMIOTM test setup for non-JTAG boards

The JTAG External Modules JEMIO^TM main features are:

Module Name		Ordering Part Number
	76 pin JEMIO.1   152 pin JEMIO.1   302 pin JEMIO.1   454 pin JEMIO.1   34 pin JEMIO.1-LVDS   76 pin JEMIO.6   xx pin JEMIO.1-UD		JEMIO.1-76 JEMIO.1-152 JEMIO.1-304 JEMIO.1-454 JEMIO.1-LVDS-34 JEMIO.6-76 JEMIO.1-UDxx

Consult StarTest for additional GPIO sets (UDxx means — Upon Demand with xx IOs).

Flynn Systems' onTAP Series 4000
Corelis' ScanExpress
JTAG Technologies' ProVision
Asset' ScanWorks
Goepel' CASCON
XJTAG' XJRunner

Fully compatible with the JTAG Live — the free circuit board debug tool. You can quickly and very simple drive, sense and sample pins and not complex clusters — it is absolutely FREE indeed!